DEC-10-HGAA-D PDP-10 System Reference Manual 196805

Order Number: XX-F94E6-9C

This document is the PDP-10 System Reference Manual, published in April 1968, detailing the architecture, instruction set, and basic input-output equipment of the Digital Equipment Corporation PDP-10 computer.

Key aspects summarized in the manual include:

  • System Overview: The PDP-10 is a general-purpose, stored-program computer with a central processor, memory, and various peripherals. It uses a 36-bit word length (stored as 37-bit with parity) and supports half-word and optional byte manipulation.
  • Central Processor: It acts as the control unit, executing instructions, performing arithmetic and logical operations, and managing peripherals. Important registers include the 18-bit Program Counter (PC), 36-bit Data Switch (DS), and various internal arithmetic registers. It features 16 general-purpose registers (accumulators), which can also serve as index registers, with an optional fast memory for quicker access.
  • Memory: The system supports a maximum of 262,144 words of memory. Memory access is asynchronous, with core memory cycle times of 1.00 or 1.65 microseconds and faster access for specific registers. Memory interleaving is supported for improved performance. Certain memory locations are reserved for system functions, such as interrupt handlers.
  • Number System: The PDP-10 uses two's complement fixed-point arithmetic for standard operations, with bit 0 as the sign bit. Optional hardware supports floating-point numbers, represented with a sign bit, an 8-bit exponent, and a 27-bit fraction.
  • Instruction Set: Instructions are categorized into data transmission, logical, arithmetic, and program control.

    • Data Transmission: Includes half-word and full-word moves, exchanges, and pushdown list operations (PUSH, POP).
    • Byte Manipulation: Instructions allow packing and unpacking of bytes of arbitrary length using a byte pointer.
    • Logical Operations: Support shifts, rotates, and all 16 Boolean functions (e.g., AND, OR, XOR), operating bitwise on full words.
    • Arithmetic Operations: Fixed-point arithmetic includes addition, subtraction, multiplication (single and double length), and division. Floating-point arithmetic provides scaling, addition, subtraction, multiplication, and division, with options for rounding and double-length results.
    • Program Control: Instructions for conditional and unconditional jumps, subroutine calls (JSR, JSP, PUSHJ, POPJ), and interrupt handling (JRST, JEN).
  • Processor Conditions & Flags: The processor uses various flags (e.g., Overflow, Carry 0/1, Floating Overflow/Underflow, No Divide, Byte Interrupt) to indicate error conditions or specific states, which can be tested or cleared by program control and I/O instructions.

  • Input-Output Equipment: Standard peripherals include paper tape readers (300 lines/sec), paper tape punches (50 lines/sec), and teletypes (KSR 35/37 models, 10-15 chars/sec). I/O operations are performed using specific instructions (CONO, CONI, DATAO, DATAI, and block I/O instructions like BLKO/BLKI).
  • Priority Interrupt System: This system allows peripherals to request service, enabling concurrent operation of the main program and devices. Interrupts are handled through priority-ordered channels.
  • Programming Conventions: The manual describes assembler mnemonics, addressing modes (direct, indirect, indexed), and the octal notation used throughout the documentation. User programs running under a time-sharing monitor have restrictions, with illegal operations trapping to the monitor.

The document provides detailed instruction formats, operational descriptions, and execution times, often noting the impact of memory locations (e.g., fast memory vs. core) and multiprocessing on performance.

XX-F94E6-9C
May 1968
136 pages
Quality

Original
7.4MB

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