F15 1D-45 PDP-1D Upd Jun4

This document is a supplement (F-15(1D-45)) for the PDP-1D-45 computer, published in 1964 by Digital Equipment Corporation. It describes special instructions added to the PDP-1D-45 specifically for Bolt Beranek and Newman.

The added instructions are grouped into three main categories:

1. Memory Reference Instructions:

   • Load Character (LCH) (Octal Code 12): Loads a 6-bit character from one of three 6-bit positions (0-5, 6-11, 12-17) within a memory word into the accumulator (AC bits 0-5). It supports an "automatic increment mode" (via Octal Code 13) which increments the memory address and cycles through character positions.
   • Deposit Character (DCH) (Octal Code 14): Deposits the 6-bit character from AC bits 0-5 into a specified 6-bit position (0-5, 6-11, or 12-17) of a memory word. It also includes an "automatic increment mode" (via Octal Code 15) for sequential character deposits and address incrementing.
   • Twos Complement Add (TAD) (Octal Code 36): Performs a 2's complement addition of a memory word to the accumulator, with a carry-in from the link flip-flop and carry-out to the link flip-flop.

2. The Skip Group:

   • SNI (644000): Skips the next instruction if any I/O register bit is one.
   • SZI (654000): Skips the next instruction if all I/O register bits are zero.
   • This group also lists general I/O operations like loading AC from I/O (LAI), loading I/O from AC (LIA), exchanging AC and I/O (SWP), and complementing I/O (CMI).

3. The Special Operate Group (Octal Code 74):

   • A new set of microprogram instructions with a 5-microsecond execution time.
   • Introduces Ring Mode, which allows repetitive looping over an eight-location section of memory, primarily affecting character and accumulator indexing instructions (LCH, DCH, IDC, IDA).
   • Integrates a Link flip-flop with the AC for carry operations (e.g., in TAD).
   • Includes instructions for setting, clearing, or sampling the Ring Mode and Link flip-flops, as well as various program flags (e.g., SCF, SZF, CLL, CML). It also provides instructions for indexing the accumulator (IDA) and character pointers (IDC), and special complement operations (SCM).

4. In/Out Transfer (IOT) Group:

   • Provides a comprehensive list of IOT instructions for various peripherals and system controls:
     • Memory and Processor Control: Entering/Leaving Ring Mode (ERG, LRG), Entering/Leaving Restrict Mode (ERM, LRM) for memory protection and trap generation, Renaming/Resetting Memory Banks (RNM, RSM).
     • Miscellaneous Processor IOT's: Reading the system clock (RCK), Clearing the trap buffer (CTB), and Rem-rand (random access memory) operations (RRO, RRI).
     • Type 23 Drum: Instructions for setting the drum initial address (DIA), word count (DWC), core location (DCL), and managing drum break/request addresses (DBA, DRA).
     • Data Communication System Type 630: Instructions for receiving and transmitting characters (RCH, RCR, TCC, TCB), reading the receiver counter (RRC), setting the send buffer (SSB), and scanner control (RSC).
     • Display IOT's (Precision CRT Display 30 & Character Generator 33): Instructions for displaying single points (DPY) using AC for X and I/O for Y coordinates, plotting characters (GPL, GPR), resetting the light pen (GCF), loading display formats (GLF) including character size and spacing, and controlling beam movement (GSP, SDB).

In essence, this supplement significantly enhances the PDP-1D-45's capabilities, particularly in character manipulation, program control through new microprogram instructions like the "ring mode," and extensive I/O operations for data communication, drum access, and CRT display with character generation.