M-1120 Aug61

This document describes the M-1120 Checkerboard Program, a maintenance utility designed for checking the performance and reliability of Digital Equipment Corporation's PDP Ferrite Core memories and their sense amplifiers.

The program's main objective is to generate maximum noise on the sense windings using various checkerboard patterns while conducting margin tests on the sense amplifiers. It offers four distinct checkerboard patterns (A, B, C, D), selectable via sense switches, and supports both 1,024 and 4,096-word memory configurations.

Upon initial loading, the program performs an error check. After writing a selected pattern to memory, it enters an indefinite loop of complementing and checking individual memory registers. If an error is detected during loading or checking, the program halts, displaying the faulty address and its contents in the In-Out and accumulator respectively, allowing the operator to investigate or continue testing.

Operating instructions include setting sense switches, activating the marginal check switch, and loading the checkerboard tape. Users are guided to vary memory margins until the program halts, noting the halt addresses and contents. Troubleshooting for bit errors involves identifying the faulty bit, checking the slice and gain of sense amplifier packages in Bay 3D, and then re-testing the margins.