M-1102A DrumSys Jul61

This permanent memorandum, dated July 14, 1961, by Gordon Bell, outlines the design and programming specifications for the PDP-1 Drum System.

System Design: The PDP-1 Drum System serves as a large backing storage for the magnetic core memory. The drum is 10 inches in diameter, 20 inches long, and rotates at 1800 rpm. It features 418 tracks, each storing 4,096 bits, yielding a total capacity exceeding 1.6 x 10^6 bits. Data is organized into 22 fields, with each field comprising 18 data tracks and a 19th track dedicated to odd parity checking during both write and read operations. Word transfer time is approximately 8.2 microseconds. A key advantage is the ability for simultaneous data interchange between any drum field and core memory, with independent addressing for each.

Programming: Drum operations are controlled using "iot" (input/output transfer) orders. Programs can specify simultaneous read/write, read-only, or write-only functions, select the drum fields for transfers, and define initial addresses in both drum and core memory, along with the number of words to be transferred.

Key iot orders include:

• iot dia: Sets the initial drum address and specifies the drum field for writing.
• iot dcc: Sets the drum field for reading, the number of words to transfer, and the initial core memory address, then initiates the transfer.

Upon initiation by iot dcc, all other computer activities (programming, high-speed channel transfers, sequence break action) are halted. Successful transfers return program control to location 201; a parity error during transfer restarts the program at location 200. Additional commands include iot dra to place the current drum address in the IO register, and iot pba to transmit a signal to the Sequence Break System when the drum position matches a specified address.