PDP-X System Architecture (Revised)

This document describes the PDP-X System Architecture, detailing its design innovations and system concepts aimed at achieving production economies, versatility, and high performance. The architecture is designed to support a wide range of implementations, from small, dedicated systems to large real-time, multi-user installations, while maintaining software and peripheral interchangeability.

Key aspects of the PDP-X architecture include:

• Efficient Memory Utilization: It addresses the inefficient core memory use of earlier small machines by introducing a more powerful instruction set and an addressing structure that minimizes memory waste. It supports both compressed 16-bit instructions for common operations and full 32-bit instructions for complex memory access and extended operation codes.
• Wide Range of Processor Performance: The architecture enables various processor models with differing price points and performance levels. This is achieved through a flexible instruction set, variable interrupt levels with associated register sets, the use of main memory to replace hardware registers, multi-processor configurations, and the use of Read Only Storage (ROS) for dedicated I/O controllers.
• Real-time and Multi-user Environment Support: PDP-X is tailored for real-time applications and multi-user environments, offering fast interrupt response, high-speed core memory, a fast I/O system, multiple sets of general registers, and a memory map to minimize problem-switching overhead.
• Modular Implementation and Integrated Option Design: The processor is partitioned into independent, small subassemblies to reduce manufacturing costs and test time, adapting to future large-scale integration (LSI) technologies. I/O controllers are designed as specialized processors using the same core architecture, leveraging software and ROS programming. A standard I/O bus facilitates connections between devices and processors, aiding multiprocessing.
• Software and Hardware Integration: Emphasis is placed on ease of use for software, with modular components, error detection, and a common I/O interface. Key software components, including assemblers, compilers, loaders, editors, and debuggers, are discussed with a focus on modularity and adaptability.

The document also provides appendices with cost analyses (comparing PDP-8 and PDP-8/S), detailed instruction format analysis, and a breakdown of major software components. It highlights the importance of concurrent design and documentation to ensure effective software and hardware integration.