Progress 7-17-67 (Architecture)

This PDP-X Technical Memorandum #10, dated July 17, 1967, provides an update on the progress of the PDP-X architecture development.

Completed and Documented Areas:

• A uniform documentation system has been established (PDP-X Technical Memorandum #1).
• The basic system architecture is complete (Technical Memorandum #6).
• The processor structure, including Central Processor organization, basic instruction set, and priority interrupt system, has been defined and described in "PDP-X Processor Description."
• The basic I/O structure is complete, encompassing the IO Bus, Teletype Input and Output, Paper Tape Reader and Punch, Light Duty Card Reader, Small XY Display, and Interprocessor Buffer. These are detailed in "PDP-X Processor Description" and various Technical Memoranda. The overall design incorporates customer suggestions and has been reviewed by key personnel, including Gordon Bell and Ivan Sutherland.

Areas Remaining to be Completed:

• Protection
• Detailed Model Specifications
• Memory Bus
• Multiprocessor Communication
• Major Peripheral Controller Structure
• Simulator