4954788 Phase Locked Loop With Bandwidth Ramp Dec89

This patent describes a Phase Locked Loop (PLL) system designed to improve data recovery from peripheral devices, such as disk drives, by optimizing its bandwidth during the signal acquisition and tracking phases.

Problem with Prior Art: Traditional PLLs for data recovery typically use a preamble (a synchronized leading signal) followed by the actual data. To achieve fast lock acquisition, these systems often start with a wide bandwidth and then abruptly switch to a narrower bandwidth before the data portion begins. This approach suffers from:

1. Noise Susceptibility: Noise pulses occurring near the end of the preamble can cause significant errors that take a long time to settle at the narrower bandwidth, leading to data loss.
2. Switching Transients: The abrupt change in bandwidth (often by switching circuit components) generates transients that further extend the settling time. Both issues necessitate longer preambles, reducing data transfer rates and storage capacity.

The Invention's Solution: The invention proposes a PLL that monotonically decreases its loop response time (by reducing its bandwidth or gain) over a specific interval. The key innovation is that this decrease:

1. Begins when the PLL receives the preamble portion.
2. Continues to monotonically decrease during at least a portion of the time that the PLL receives the data portion.

This gradual, extended reduction in bandwidth or gain (rather than an abrupt switch before the data) addresses the shortcomings of prior art. The response time can be decreased linearly or, preferably, exponentially, which minimally perturbs the loop. A specific embodiment uses a charge pump with a linearly decreasing signal generator to achieve this variable gain control.

Benefits: By implementing this "bandwidth ramp" that extends into the data portion, the invention achieves:

• Reduced Lock Acquisition Time: The PLL settles faster, especially when the ramp continues into the data.
• Increased Noise Immunity: The gradual change and extended bandwidth reduction significantly reduce susceptibility to noise perturbations, preventing large errors.
• Shorter Preamble Requirements: The improved performance allows for shorter preambles, thereby increasing the usable data storage capacity and overall data read time.