This document, the "Alpha Architecture Reference Manual, Fourth Edition," published by Compaq Computer Corporation in January 2002, serves as a comprehensive technical specification of the Alpha processor architecture. It details the design, instruction set, system architecture, and operating system-specific implementations of the 64-bit load/store RISC architecture.
The manual is structured into several key parts:
- Common Architecture (Part I): This foundational section describes the core principles of the Alpha architecture. It highlights its design for high-speed implementations, emphasizing clock speed, multiple instruction issue, and multiprocessing capabilities. Key architectural features include 64-bit registers and operations, fixed 32-bit instruction length with a 6-bit opcode, and support for various data types (bytes, words, longwords, quadwords, and both VAX and IEEE floating-point formats). It outlines the primary instruction formats (Memory, Branch, Operate, Floating-Point Operate) and categories like integer arithmetic, logical/shift, and byte manipulation.
- System Architecture and Programming Implications (Part I): This part delves into critical aspects for system and software developers, covering memory coherency, cache and write buffer behavior, and strategies for data sharing (including atomic operations using load-locked/store-conditional sequences). It emphasizes the importance of explicit memory barrier instructions for ensuring correct read/write ordering in multiprocessor environments, and discusses the handling of arithmetic traps.
- Privileged Architecture Library (PALcode): A distinctive feature of the Alpha architecture, PALcode is a customizable software layer specific to each operating system (e.g., OpenVMS, Tru64 UNIX, Alpha Linux, and historically Windows NT). It abstracts complex, privileged, or atomic functions, such as context switching, interrupt and exception handling, memory management, and low-level hardware access, from the core hardware. This approach facilitates OS portability and enables various performance optimizations.
- Operating System-Specific Implementations (Parts II-A, II-B, II-C, F): Dedicated sections detail how specific operating systems (OpenVMS, Tru64 UNIX, Alpha Linux, and Windows NT in an archival section) interact with the Alpha architecture. These parts provide specifics on PALcode instructions, register usage conventions, memory management schemes, process structures, and exception/interrupt handling tailored to each OS environment.
- Console Interface Architecture (Part III): This section describes the role of the console firmware in system initialization, bootstrapping, and monitoring. It outlines the interface provided to system software, including the Hardware Restart Parameter Block (HWRPB) which serves as a shared data structure for system state information.
- Appendices: These sections offer supplementary information, such as guidelines for software optimization, detailed discussions on IEEE floating-point conformance, a comprehensive instruction summary by opcode and mnemonic, registered system and processor identifiers, and architectural waivers or implementation-dependent functionalities.
In summary, the manual provides an exhaustive reference for the Alpha architecture, encompassing its fundamental design principles, detailed instruction set, memory model, the versatile PALcode mechanism for OS integration, and console interactions, all aimed at enabling high-performance and flexible computing systems.