M715

This document is an electronic schematic diagram titled "READER CLOCK M715," copyrighted in 1967 by Digital Equipment Corporation. It details the circuitry for a clock generator, likely intended for a data reader (such as a paper tape reader).

Key aspects of the document include:

1. Purpose: To generate clock and shift signals, and manage stop/start operations for a reader device. It is explicitly stated as proprietary and for test/maintenance purposes only.
2. Inputs: ENABLE, RUN, FEED SW (Feed Switch), MOTOR ON CH (Motor On Channel), STROBE, and INHIBIT STROBE.
3. Outputs: STOP DELAY, STOP COMPLETE, SHIFT (AS and AT), CLK, and CLOCK I.
4. Functional Blocks:
   • Control Logic: Uses various integrated circuits (E1-E7, which are DEC7400-series NAND, NOR, Inverter gates, and DEC9601 Monostable Multivibrators) to process input signals like ENABLE, RUN, and FEED SW to produce stop/start control and status outputs.
   • Timing Circuits: Includes delay elements, specifically a "STOP DELAY" (45ms) and a "CATCH" delay (2.8ms), implemented with RC networks and gates.
   • Clock Generation: A significant portion of the circuit involves a transistor-based oscillator/timing network (Q1-Q5, with associated resistors, capacitors, and diodes D1-D9) combined with logic gates (E3, E4, E7) to produce the core CLK, CLOCK I, and SHIFT (AT) output signals.
   • Strobe Control: The STROBE input and INHIBIT STROBE signal (controlled by transistor Q7, MPS6531) interact with the clock generation logic.
5. Components: The schematic uses a mix of integrated circuits (DEC7400, DEC7404, DEC9601, DEC7402), discrete transistors (DEC6534D, MPS6531), and diodes (D664). Standard resistor (1/4W, 5%) and capacitor (0.1uF, 100V, 20%) tolerances are specified unless otherwise indicated.
6. Power: The circuit operates with +5V, +2.8V, and -15V supplies. All ICs require Pin 7 for GND and Pin 14 for +5V.

In essence, the M715 Reader Clock is a digital control and timing circuit from 1967, designed by Digital Equipment Corporation, to generate synchronized clock and shift pulses and manage operational states (like start/stop delays) for a data reader, utilizing early TTL integrated circuits and discrete components.