M708

This document is a schematic diagram for the CLOCK CONTROL M708 unit, a proprietary circuit designed by Digital Equipment Corporation in 1968, intended for test and maintenance purposes.

The M708 circuit is a digital logic system that primarily manages and generates control signals related to system clocks and interrupts. It processes various input signals (such as MBx(x) and IOPx(x)) using a series of integrated circuits, including DEC74xxN series logic gates and flip-flops (E1 through E9).

Key functionalities of the circuit include:

• Clock Signal Generation: It generates specific clock signals like "CLOCK IOT" and "CLOCK P4" based on input conditions.
• Flag Management: It incorporates "FLAG BUFFER" and "FLAG" flip-flops (E4), which control and indicate a "FLAG" state. This flag can directly influence "I/O BUS IN INTERRUPT" and "I/O SC IN SKIP" operations.
• Enable Controls: It produces "CLOCK ENABLE" (J2) and "INTERRUPT ENABLE" output signals (E2), which are controlled by other logic and an "INITIALIZE" input.
• Initialization and Counter Loading: The circuit includes logic for "INITIALIZE" (PI) and "LOAD COUNTER" (V2) functions, driven by specific MBx(x) inputs.
• Overflow Detection: An "OVERFLOW - V1" signal is also generated by the clock logic.

The system utilizes various resistors (R1-R6) and capacitors (C1-C9) and operates from a +5V power supply.