M220

This document is a proprietary digital circuit schematic titled "MAJOR REGISTERS M220" from Digital Equipment Corporation, dated March 15, 1967. It is intended solely for test and maintenance purposes.

The schematic details the design of key computer registers and associated data manipulation logic. Its main features include:

• Registers: It depicts multiple registers, likely including Accumulator (AC), Program Counter (PC), Memory Address (MA), and Memory Buffer (MB) registers, in what appears to be a dual-channel or multi-bit configuration (e.g., AC2, AC3, MB2, MB3, etc.).
• Arithmetic and Logic Units: It integrates several "ADDER" blocks (ADDER0, ADDER2, ADDER5) for arithmetic operations.
• Shift Operations: Control logic for various shift operations is present, including "SHIFT RIGHT," "SHIFT RIGHT TWICE," "SHIFT LEFT," "SHIFT LEFT TWICE," and "NO SHIFT."
• Data Control: A comprehensive set of "ENABLE" signals (AC, MQ, SR, SC, Data, IO, MA, PC, MEM, Data Address) are provided to control the flow and processing of data within the register system.
• Components: The design utilizes various DEC74xx series integrated circuits (e.g., DEC7474N, DEC7460N, DEC7453N, DEC7482N, DEC7440N) for logic gates, registers, and adders, along with resistors and capacitors.
• Power and Grounding: Specifies +5V, +3V, and 13V power rails, and grounding connections, including specific pin assignments for ICs.

In essence, the document illustrates the internal logic and interconnections of a major register unit within an M220 computer system, demonstrating its capabilities for data storage, shifting, and arithmetic processing under various control signals.