M211

This document is a schematic diagram for the Digital Equipment Corporation (DEC) M211 Binary Up/Down Counter, dated October 12, 1967.

Key features of the circuit:

• Function: It is a 6-bit binary counter capable of counting both upwards and downwards.
• Architecture: The core of the counter is built from six cascaded D-type Flip-Flops (FF0 through FF5), specifically identified as DEC7474N integrated circuits (E1, E6, E9).
• Logic Gates: Various DEC7400 series integrated circuits (DEC7400N, DEC7440N, DEC7450N) are used to implement the control logic, including buffering, and/or functions. A note specifies that DEC7451N may be used in place of DEC7450N.

• Inputs:

  • D2 COUNT IN: The main clock input for the counter pulses.
  • B1 UP/DOWN: Controls the direction of counting (up or down).
  • A1 ENABLE: Activates or deactivates the counter.

• Output:

  • H1 CARRY OUT: Indicates an overflow or underflow condition.

• Power Supply: The integrated circuits require +5V (pin 14) and Ground (pin 7), with an additional +3.0V rail indicated for some inputs.

• Other Components: Includes resistors (R1, R2) and multiple decoupling capacitors (C1 through C11).

The schematic is marked as proprietary to Digital Equipment Corporation, furnished for test and maintenance purposes only.