This document is a schematic diagram titled "3-8 INPUT NAND-GATES M119" from Digital Equipment Corporation, dated August 1967.
The schematic illustrates three identical 8-input NAND gates (E1, E2, E3), each with specific input and output pins identified. It includes notes specifying that Pin 7 on each integrated circuit (IC) is connected to ground (GND) and Pin 14 to +5V.
A separate section of the circuit features a resistive network (R1, R2, R3, R4) with input/output points UI and V1, and three decoupling capacitors (C1, C2, C3) connected between +5V and ground.
A parts list details the components:
The document states it is for "TEST AND MAINTENANCE PURPOSES" and that the "CIRCUITS ARE PROPRIETARY IN NATURE," copyrighted by Digital Equipment Corporation in 1967. The document number is M119-0-1, Revision B.
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