This document is the Digital Semiconductor 21174 Core Logic Chip Technical Reference Manual, a preliminary revision for designers using the 21174 chip.
The 21174 is a single-chip core logic PCI-to-21164 interface designed for low-cost uniprocessor workstations. It functions as a central controller, bridging the memory, PCI bus, and the 21164 processor (including Flash ROM).
Key features and functionalities described include:
- Memory Control: It acts as a synchronous dynamic RAM (SDRAM) memory controller, supporting optional L3 Bcache, quadword ECC, longword parity, and refresh mechanisms. It details memory sequencers, DMA read/write transactions (including solutions for known DMA page boundary and lock problems), and DRAM initialization.
- PCI Interface: Provides a 64-bit, 33 MHz PCI interface, including scatter-gather map support with DMA read prefetch and write buffering (with merging capabilities), and handling of I/O write buffers, configuration cycles, and special cycles.
- Flash ROM Interface: Supports direct attachment and startup from Flash ROM, with details on its address mapping and access times.
- System Integration: Features an on-chip Phase-Locked Loop (PLL) for clock generation, a precision DRAM clock aligner, Auto DACK for accelerated data transfers, and a "dummy memory" block for cache flushing.
- Interrupts and I/O: Manages 64 interrupts and 32 general-purpose inputs/outputs via external shift registers.
- Control and Status Registers (CSRs): Provides extensive definitions and descriptions of various registers for general control, diagnostics, performance monitoring, error reporting, memory control, PCI window control, address translation (including Scatter-Gather TLB), and interrupt control.
- Address Space Management: Details the complex mapping of 21164 40-bit physical addresses to memory and I/O space, including dense and sparse memory regions, and the translation of PCI-initiated addresses to physical memory using programmable windows and Scatter-Gather TLB.
- Electrical, Mechanical, and Thermal Specifications: Includes detailed electrical ratings, package dimensions, and thermal management recommendations with heat sink specifications.
The manual is intended to provide designers with comprehensive information on the operation, configuration, and use of the 21174 core logic chip.