G228

This document is a proprietary schematic diagram for the "INHIBIT DRIVER G228" (part number G228-0-1, Revision F), developed and copyrighted in 1967 by Digital Equipment Corporation (DEC). Its stated purpose is for test and maintenance.

The schematic illustrates a multi-channel driver circuit, each channel typically comprising:

• Input logic implemented with NAND gates (DEC7440N integrated circuits), which operate with Pin 7 as Ground and Pin 14 as +5V.
• Signal transformation and isolation using a pair of transformers (either T2037 as a default, or T2052 as indicated for specific stages).
• Transistors (DEC1008 / MM1008) for amplification.
• Various diodes (D664 / IN3606 and D672 / IN3653) and resistors.

General component specifications, unless otherwise indicated, include:

• Resistors: 1/4W, 5% tolerance.
• Capacitors: 0.1MFD, 100V, 20% tolerance, with one exception (C5) specified as 20MFD, 50V, -10+75%. The circuit utilizes +5V and -30V supply rails. A conversion chart provides EIA equivalent part numbers for the specified DEC transistors and diodes.