Alpha 21164 Microprocessor Data Sheet

This document is a technical data sheet for the DIGITAL Alpha 21164 Microprocessor, providing an overview of its architecture and specifications as of August 1998.

Key features of the 21164 include:

• A fully pipelined, 64-bit advanced RISC architecture, supporting multiple operating systems like Microsoft Windows NT, DIGITAL UNIX, and OpenVMS.
• Operating frequencies ranging from 366 MHz to 600 MHz.
• Superscalar 4-way instruction issue and a high-bandwidth (128-bit) interface, achieving a peak execution rate of 1.7 BIPS.
• Manufactured using 0.35-µm CMOS technology.
• Integrated three on-chip caches: an 8KB direct-mapped L1 instruction cache, an 8KB dual-ported, direct-mapped, write-through L1 data cache, and a 96KB 3-way, set-associative, write-back L2 data and instruction cache.
• Support for an optional board-level L3 cache (1MB to 64MB).
• Implementation of IEEE Sfloating and Tfloating, VAX Ffloating and Gfloating data types, and support for longword and quadword integers, with byte and word support via byte-manipulation instructions. It also has a 3.3-V external and 2.5-V internal interface.

The document further details the processor's microarchitecture (including its instruction fetch/decode, integer, floating-point, memory address translation, and cache control units), pinout and signal descriptions, functional overview of its clocks, backup cache (Bcache) interface, system interface, interrupts, and test modes. It also covers Alpha architecture basics, IEEE floating-point conformance, internal processor registers, PALcode, instruction summary, electrical data (power, clocking, timing), thermal management, and mechanical specifications.