4708 Sep65

The DIGITAL EQUIPMENT CORPORATION (DEC) 4708 is a 7-Bit Receiver, functioning as a serial-to-parallel converter. Housed on a double-length DEC System Module board, it facilitates the transfer of asynchronous serial data into a parallel digital format.

Key Features and Operation:

• Data Format: Processes 7-bit characters, which can consist of 9.0, 9.5, or 10.0 units, by removing Start and Stop elements and assembling the data into a shift register. The bit immediately following the Start bit is the least significant bit.
• Synchronization: Samples the incoming data line 8 times per unit. Upon recognizing a Start element, it synchronizes, enters an active state, and resets its shift register.
• Data Assembly: Gating of the Start element and then 7 data elements occurs at full unit intervals. Once a complete 7-bit character is assembled, a "Flag" is set to signal an external device.
• Error Handling: It samples 1/2 unit after the Start signal to eliminate brief line hits or noise.
• Speed: The Clock input frequency should be 8 times the baud rate, with a maximum of 100 kHz, supporting baud rates up to 12.5 kc.

Inputs & Outputs:

• All inputs (Clock, Enable, Data Input, Clear Flag) and outputs (7 data bits, optional 8th bit, Active status, Flag status, Indicator Lamp) conform to DEC Standard Levels, with specific loading and timing requirements detailed.
• Customization: The module offers jumper-selectable options for bit polarity (outputting -3V or ground), stop code length (1, 1.5, or 2 units), active output connection, and flag clearing behavior.

Specifications:

• Power: -15 volts/190 mA; +10 volts/6 mA.
• Cost: Originally $245.00 (Non-Catalog) as of September 8, 1965.