Semiconductor Handbook V1 Errata 1987

Order Number: XX-B5206-B5

This document is an Errata for Volume 1 of the 1987 Digital Semiconductor Databook, issued by Digital's Semiconductor Operations. Its primary purpose is to provide additions and revisions to the information contained in the original databook, and it is marked "Confidential and Proprietary."

The document is structured as follows:

  1. An introduction lists specific page numbers from the original 1987 databook that have been updated, along with a brief description of the change (e.g., "Confidential and copyright disclosure," "Recommended Operating Conditions," "Table 19 and Notes," "External vector enable (XVEC)").
  2. The bulk of the document comprises the actual revised and added pages themselves, which contain detailed technical information, specifications, and diagrams for various Digital semiconductor components. This updated content includes:
    • Product identification codes and cross-referencing for a range of DC-series and 780-series devices (e.g., DC003, DCJ11 16-bit Microprocessor, MicroVAX 32-bit CPU).
    • MicroVAX 78032 CPU: Recommended operating conditions, part number variations, clock input timing, CPU read and write cycle timing parameters, and reset timing parameters.
    • MicroVAX 78516 Interrupt Controller (VIC): Pin/signal definitions, bus interface signals, register descriptions (Polarity, Level/Edge, Pending Summary, IRQ Map, Round Robin, Interrupt Vector), interrupt triggering, DC electrical characteristics, and various timing parameters for read, write, and interrupt acknowledge cycles.
    • MicroVAX 78532: DC electrical characteristics, MicroVAX bus master read and write cycle timing, and I/O bus DMA cycle timing.
    • DCJ11 Microprocessor: Signal and pin descriptions, memory management register details, asynchronous and synchronous interrupts and traps, bus read/interrupt acknowledge timing, DC and AC electrical characteristics, and clock output timing parameters.
    • DC319-AA DLART (Asynchronous Receiver/Transmitter): Features, description, and block diagram.
    • LSI-11 Chipkit descriptions and details on UNIBUS devices (e.g., DC013 UNIBUS Request Logic, DC021 Octal Bus Transceiver).
    • VAXBI 78743 BCAI: II Bus mask bit assignments, II Address/Strobe/Write/Read Strobe, Parity Select, DMA/MAP Page Overflow, BCI bus signals, general register addressing, DC and AC electrical characteristics, and timing parameters for BCI and II bus interface read/write transactions and DMA/MAP address increment.
    • VAXBI 78733 BCI3: DC electrical characteristics.
    • DC004 and DC005 4-Bit Transceivers: Pin/signal descriptions, features, and simplified logic diagrams.

In essence, this document serves as a critical update to the 1987 databook, providing detailed and corrected technical data, timing specifications, and functional descriptions for various Digital semiconductor components, particularly focusing on MicroVAX and VAXBI-related integrated circuits and their interfaces.

XX-B5206-B5
1987
72 pages
Quality

Original
8.7MB

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