Alpha 21064A Microprocessors Data Sheet

This document is a data sheet for the Alpha 21064A family of 64-bit RISC microprocessors by Digital Equipment Corporation, published in January 1996.

It covers five versions: 21064A-200, 21064A-233, 21064A-275, 21064A-275-PC, and 21064A-300, which primarily differ in clock frequency. A key distinction is that the 21064A-275-PC has specific memory management functions tailored for the Windows NT operating system, while the other four are functionally identical.

Key features of the Alpha 21064A include:

• 64-bit RISC Alpha architecture.
• Super-scalar and super-pipelined design (7-stage for integer, 10-stage for floating-point) with dual instruction issue, achieving peak execution rates of 400 to 600 MIPS depending on the version.
• Two on-chip 16-Kbyte caches (instruction and data) with parity protection.
• Dedicated integer, floating-point, load/store, and branch functional units.
• Support for 43-bit virtual and 34-bit physical addressing (16 Gbytes).
• A programmable external cache interface supporting sizes from 0 to 16 Mbytes and selectable 64-bit or 128-bit external data paths with byte parity.
• Backward compatibility with the 21064 model in pin layout and software, with minor specific pin reallocations and protocol differences noted.
• Comprehensive floating-point support for IEEE single/double precision and VAX F/G data types, with limited VAX D-floating support.

The data sheet provides extensive technical details including signal names and functions, instruction set summaries (including IEEE and VAX floating-point conformance and specific 21064A instructions), internal processor registers, electrical characteristics, thermal considerations, and mechanical specifications (package dimensions, pinout).