dtj v09-02 1997

This issue of the Digital Technical Journal (Volume 9, Number 2, 1997) focuses on two primary areas of Digital Equipment Corporation's technological advancements: Internet Security and Mail under the AltaVista brand, and the design of high-performance, low-cost Alpha-based Personal Workstations.

Key highlights include:

1. AltaVista Internet Security and Mail:

   • AltaVista Tunnel: Describes a product that enables secure, network-level routing over the public Internet to extend corporate networks. It achieves this by combining tunneling (IP-in-TCP encapsulation) with secure channels using cryptographic measures (RSA, keyed hashing, RC4) to ensure authenticity, integrity, and privacy. Its deployment within Digital is noted for significant cost savings.
   • AltaVista Firewall: Details a security product for protecting private networks, built on the principle of "deny unless expressly permitted." It's an application-level firewall with transparent proxying, featuring a hardened kernel, a flexible access control system, comprehensive logging and alarm systems, and various application gateways (e.g., WWW, SMTP, FTP, Telnet). It also includes an authentication service supporting multiple mechanisms and a custom DNS solution to enhance network privacy.
   • AltaVista Mail: Discusses the development of Internet-based electronic messaging software (SMTP/POP3 server, gateways). The article highlights a shift in product development philosophy towards rapid prototyping, market-driven design, simplicity, low cost, and a focus on minimizing support requirements, rather than adherence to traditional, lengthy architectural processes.

2. Alpha-Based Workstations for NT and UNIX:

   • DIGITAL Personal Workstations Design: Explores the rationale and features behind Digital's new low-cost, high-performance Alpha systems. A key innovation is the 21174 single-chip core logic ASIC, which integrates traditional multi-chip core logic. The design emphasizes a direct CPU-to-memory bus connection (bypassing the core logic chip itself for data) using QuickSwitch bus separators and leverages emerging synchronous DRAM (SDRAM) technology to optimize performance.
   • 21174 Memory Controller: Provides a deep dive into the 21174 ASIC, which manages the CPU-to-memory interface. Its design goals include significantly reducing main memory latency overhead and maximizing the raw bandwidth of the Alpha 21164 data bus. Features like a sophisticated clock distribution strategy, a low-cost interrupt scheme, and adaptive "hot row" operation (a prediction scheme to keep frequently used memory rows open) are detailed, contributing to improved performance for memory-intensive applications.

Overall, the journal reflects Digital's strategic pivot towards leveraging its core technologies (Alpha processors, networking expertise) to meet the evolving demands of the burgeoning Internet market, with a strong emphasis on security, cost-effectiveness, and agile product development.