Comparison of IBM and Digital Storage Architectures Mar90

This confidential document from March 29, 1990, titled "COMPARISON OF IBM AND Digital STORAGE ARCHITECTURES (including Vail)," provides an architectural and functional comparison of IBM and Digital's I/O subsystems. Intended for Digital's internal marketing and engineering personnel, the report aims to educate readers on the historical evolution of IBM's I/O architecture (from System/360 to 370/ESA) and compare it with Digital's current Digital Storage Architecture (DSA), including the emerging Vail concepts.

Key Differences and Comparisons:

1. Philosophical Approach:

   • Digital: Views I/O as a special case of communication, with its DSA built upon communication layering (e.g., VAXclusters, CI, DSSI). It focuses on maximizing I/O requests per second for systems with "bounded I/O appetite."
   • IBM: Views communication as a special case of I/O, evolving an "open-ended" architecture for "indeterminately powerful systems." Its primary performance metric is data throughput (maximum data delivered in the least time).

2. I/O Management & Offload:

   • Both architectures have evolved to offload I/O management from the host CPU to the I/O subsystem using microprocessing.
   • IBM: Employs a "channel subsystem" that handles path selection and dynamic reconnection, offloading routing overhead and I/O busy conditions from the CPU. Requests queue in the virtual subchannel if all paths are busy.
   • Digital: Host initiation is interrupt-driven, using memory-mapped registers. Request queueing occurs at the adapter (like HSC controllers) rather than the host CPU.

3. Path Management and Performance:

   • IBM: Offers multiple channels (e.g., 256 subchannels/channel on 3090J series), supporting up to 4096 storage addresses per channel and high aggregate bandwidth (e.g., >1 GB/s). It has actively reduced "Rotational Position Sensing (RPS) miss" (delay due to path unavailability during rotational positioning) through architectural improvements.
   • Digital: A single CI (Computer Interconnect) can support multiple controllers (HSCs) and devices. While a VAX9000 with multiple CI ports can achieve high aggregate bandwidth (e.g., 96 MB/s), current adapters are single-path constrained. The Vail architecture, with its Storage Element Buffer Bus (SEBB), is designed to significantly reduce RPS miss and improve throughput.

4. Workload Characteristics & Data Formats:

   • IBM: Uses Count-Key-Data (CKD) disk format, typically resulting in larger block sizes (22-25 KBytes/request), which means fewer I/O requests per second for the same amount of data transfer.
   • Digital: Uses Fixed Block Architecture (FBA), typically with smaller request sizes (4-8 KBytes/request), leading to inherently higher I/O request rates for the same data volume.

5. Caching and Storage Hierarchy:

   • IBM: Offers controller-based caches (e.g., 3990-M3) and "Expanded Storage," which functions as a fast paging/data storage device, effectively an extension of central memory, significantly reducing access delays to rotating media. Its architectural limit for expanded storage is 16 Terabytes.
   • Digital: As of 1990, lacked commercial cache products but was developing a multi-level caching strategy (host, controller, device). HSC was implementing a writethrough cache, and Vail includes nonvolatile cache memory (CMM) for write-behind caching. VAX host memory with Global Sections is a current competitive answer to expanded storage but lacks its vast capacity.

Digital's Competitive Weaknesses (as of 1990):

• Short-term (being addressed): Lack of caching products, limitations of single host CI ports (addressed by VAX9000), and processor affinity issues with the VMS fork dispatcher (a VMS software issue).
• Long-term (not addressed): Inherently higher I/O request rates due to smaller data block sizes and no clear long-term answer to IBM's large-scale Expanded Storage capabilities (16TB potential).

Overall, the document highlights a fundamental divergence in design philosophies, with both companies evolving their I/O subsystems to address performance bottlenecks, particularly concerning I/O processing offload, path efficiency, and data access latency.