290143-004 82385 386 cache 198911

The Intel 82385 is a high-performance 32-bit cache controller designed to significantly improve the performance of Intel386 Microprocessor systems. Its primary function is to store frequently accessed code and data in a local cache memory, enabling the 386 DX to operate with nearly zero average CPU wait states, including zero-wait-state read hits and posted memory writes.

Key features and benefits include:

• Performance Enhancement: Achieves high cache hit rates (up to 99%) by reducing main memory access times, allowing the 386 DX to run at its full potential.
• Synchronous Dual Bus Architecture: Enables the 386 DX to operate locally from its cache, while a separate system bus remains available for other masters, improving overall system bandwidth.
• Cache Coherency: Employs a "bus watching" (snooping) mechanism that monitors system bus activity. If another master modifies data that is also in the cache, the 82385 automatically invalidates the stale cache entry, ensuring data consistency without performance overhead.
• Flexible Cache Organization: Supports external 32 Kbyte cache memory with options for direct-mapped or 2-way set-associative configurations, a unified cache for both code and data, and the ability to define non-cacheable memory areas.
• Integrated Logic: Combines the cache directory and all necessary cache management logic onto a single chip, reducing board space and improving performance.
• Software Transparency: Operates completely transparently to system software, requiring no changes to existing code.
• Compatibility: Optimized for use with the 386 DX, supporting various clock speeds (16-33 MHz) and mapping the full 4 Gigabyte address space.

In essence, the 82385 acts as an intelligent intermediary, intercepting 386 DX memory requests. It quickly provides data from its cache on a "hit," or efficiently fetches and stores it from main memory on a "miss," all while maintaining data integrity across the system.