Alpha AXP System Reference Manual

Order Number: XX-8FAED-18

This document details the Alpha AXP architecture, a 64-bit load/store RISC design optimized for high performance through features like fast clock speeds, multiple instruction issue, and support for multiple processors. It is designed to be operating-system and programming-language neutral, explicitly supporting OpenVMS AXP, DEC OSF/1, and Windows NT AXP.

Key architectural characteristics include:

  • True 64-bit design: All registers and operations are 64-bit.
  • Simple instructions: All instructions are 32 bits long, with memory operations limited to loads and stores, and data manipulation occurring between registers.
  • Pipelining and binary compatibility: Designed to facilitate pipelining by avoiding special registers and condition codes, and to ensure binary compatibility across diverse implementations.
  • Efficient byte manipulation: Byte operations are handled via 64-bit register-to-register instructions, avoiding slower single-byte store instructions and benefiting cache design.
  • Flexible arithmetic traps: Arithmetic traps are typically imprecise for performance, but precise trapping can be enforced with explicit trap barrier instructions.
  • Multiprocessor shared memory model: Provides mechanisms like load_locked and store_conditional for atomic operations, along with explicit memory barrier instructions to ensure strict ordering of memory accesses in multiprocessor systems.
  • Performance hints: Instructions include hints for jump targets, data prefetching, and virtual-address mapping granularity to optimize performance.
  • PALcode (Privileged Architecture Library): A flexible software layer handles operating system-specific primitives such as context switching, interrupts, exceptions, and memory management, allowing PALcode to abstract hardware differences from system software.

The manual is structured into three main parts: Common Architecture (covering fundamental design, instruction formats, and system implications), Specific Operating System PALcode Architecture (detailing OS-specific implementations for OpenVMS, DEC OSF/1, and Windows NT), and Console Interface Architecture (describing console functions and bootstrapping procedures). It also includes several appendices covering software considerations, IEEE floating-point conformance, instruction summaries, and system/processor identifiers.

XX-8FAED-18
2000
886 pages
Quality

Original
37MB

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