PDP-8/E

This document provides detailed technical documentation and logic diagrams for the PDP-8/E computer's programmer's console, major register gating, and power supply systems.

Summary of Contents:

• Programmer's Console: Detailed logic operation for the various front panel keys (DEP, EXAM, ADDR LOAD, CLEAR, CONT, etc.) and switches (SWITCH REGISTER, SING STEP, HALT). It explains how these controls interface with the computer to initiate timing cycles, deposit or examine memory, and display register data via LEDs.
• Major Register Gating: Technical description of the data flow and gating network between the PDP-8/E's major registers (PC, CPMA, AC, MQ, MB). It explains the use of multiplexers for selecting register inputs and outputs, and the control signals (source and destination) required for instruction execution.
• Major State Register: Explanation of the PDP-8/E's major states (FETCH, DEFER, EXECUTE, and DMA/Data Break) and the logic governing transitions between them.
• Programmed I/O Transfer: Description of the I/O transfer logic using IOT instructions to communicate with peripheral options via the OMNIBUS.
• Teletype Control (KL8-E): Detailed functional and logic descriptions for the Teletype control, covering address selection, receiver/transmitter operations, the clock logic, and buffer control.
• Power Supplies: Technical specifications and circuit descriptions for the H729/H740 series power supplies, including input circuits, regulated voltage outputs (+5V, +15V, -15V), voltage monitoring, and overvoltage protection.