Principles of Operation

This document serves as an introduction to the functional operation of the PDP-8/E processor. It outlines the three levels of system operation, which include a simplified block diagram, flow charts relating instructions to time states, and detailed logic theory.

The chapter describes the core components of the system, including:

• The OMNIBUS: The central communication path for modules.
• Timing and Control: The Timing Generator (M8330) and Register Control (M8310) which manage processor states and instruction execution.
• Memory: The MM8-E memory system, comprised of stack, driver, and sense/inhibit modules.
• Major Registers: The module (M8300) housing the PC, CPMA, MB, AC, and MQ registers.
• Support and Peripherals: Descriptions of the Power Supply (H724), Bus Loads (M8320), Teletype Control (M8650), Programmer’s Console (KC8-EA), and RFI shielding.

The document concludes with a "Signal Finder" table, which provides a technical summary of key system signals, their logic references, and their functional descriptions to assist users in navigating the detailed system logic.