Be Adder Tests

Summary

This document provides the operational specifications and maintenance information for the Be Adder Tests program (MAINDEC-BE-D0CC-D), which was created on September 1, 1971.

The program is designed to test the adder circuits of the PDP-8 computer. It is composed of five primary functional parts:

• TAD Instruction Simulator: Tests all combinations of two arguments.
• Rotate Instruction Simulator: Tests rotation arguments (RAL, RAR, RTL, RTR, and BSW).
• Carry Generation Test.
• Random Number Test.
• Field Relocation Adder Test.

The document details the hardware requirements (a PDP-8 with at least 4K of memory and a teletype), loading instructions, and control switch settings. It also includes comprehensive troubleshooting information, listing the specific error messages and halt conditions for each of the test modules, allowing technicians to diagnose and isolate hardware failures within the adder circuits.