This document describes the PDP-8 Instruction Test Part 2B, a diagnostic program designed to verify the 2s complement addition (TAD) logic and rotate instructions (RAL, RTL, RAR, RTR) of a PDP-8 computer.
Key features include:
- Functionality: The program uses pseudo-random numbers to test the addition and rotate logic, comparing hardware results against expected values. It generates error printouts to help identify specific bit failures.
- Operation: The user controls the test via the console switch register, which allows for setting different modes (e.g., stopping on error, scope/looping mode, or switching between the addition and rotation tests).
- Requirements: The test requires a PDP-8 processor and keyboard reader, with the program occupying memory locations 20-4177 (octal).
- Execution: It is recommended to run this test only after successfully completing the Instruction Test Part 2A. The document provides detailed instructions for loading, starting, and troubleshooting errors, including interpreting error printout formats.