Fpp-12 Floating Point Processor

This document serves as the technical user's manual for the FPP-12 Floating Point Processor, a peripheral designed for use with Digital Equipment Corporation's PDP-12 and PDP-8 series computers.

The manual is organized into four primary chapters:

• Chapter 1 (Programming Data): Provides an overview of the FPP-12’s architecture, its floating-point and fixed-point number systems, register organization, and the instruction set. It explains how the FPP-12 functions as a programmable, parallel processor that uses direct memory access (data breaks) to perform high-speed arithmetic.
• Chapter 2 (Programming Examples): Offers practical guidance for programmers, including examples of initialization, the use of index registers for address modification and loops, creating push-down stacks, writing re-entrant subroutines, and debugging techniques.
• Chapter 3 (FPP-12 Components): Details the hardware architecture, including logic systems, register descriptions, data flow diagrams, and the timing generator states (INITIATE, FETCH, PROCESS, EXECUTE, DEPOSIT, and EXIT) that govern the processor's operations.
• Chapter 4 (Installation): Outlines installation requirements, including necessary wiring changes for various computer models, AC power specifications, and diagnostic procedures for checking out the processor.

The manual is intended to assist users in integrating, programming, and maintaining the FPP-12 to achieve significant improvements in computational speed for complex mathematical algorithms and data processing tasks.