This document serves as the technical documentation for a 32K dynamic MOS memory module (part number W9002-797) designed for use with Digital Equipment's PDP8e and PDP8a computers. The module features high-density 16K memory chips on a single Quad Omnibus circuit board, incorporating integrated refresh control and address decoding to save space and maintenance costs.
Key details provided include:
- Specifications: Detailed electrical, environmental, and timing requirements, including access times of 150 nsec.
- Configuration: Instructions for field selection (4K blocks) using solder jumpers on the component platform (Bauteilplattform Nr. 62).
- Operations: Descriptions of read/write cycles, memory elements (Type 4116 ICs), and addressing.
- Installation: Procedures for setup and caution regarding correct insertion of the board into the Omnibus.
- Technical Schematics: The document concludes with logic diagrams, timing charts for read and write cycles, and data input/output schematics.