Alpha Architecture Handbook

Order Number: EC-H1689-10

This "Alpha Architecture Handbook" by Digital Equipment Corporation, published in 1992, describes the technical specifications and design principles of the Alpha architecture.

The document details Alpha as a 64-bit load/store RISC (Reduced Instruction Set Computer) architecture, designed for high clock speed, multiple instruction issue, and multiprocessor systems, aiming for long-term binary compatibility and neutrality towards various operating systems and programming languages (specifically mentioning VAX VMS and OSF/1 UNIX support).

Key aspects covered include:

  • Basic Architecture: Defines addressing, fundamental data types (byte, word, longword, quadword), and both VAX and IEEE floating-point formats, noting which VAX data types lack hardware support.
  • Instruction Formats and Descriptions: Provides a comprehensive overview of Alpha's 32-bit instruction formats (Memory, Branch, Operate, Floating-Point Operate, PALcode) and its register set (32 integer, 32 floating-point, Program Counter, lock, and optional registers). It then details various instruction types: integer load/store, control (branches, jumps), arithmetic, logical, shift, byte-manipulation, floating-point operations (add, subtract, multiply, divide, convert, compare, copy sign, conditional move), and miscellaneous instructions.
  • System Architecture and Programming Implications: Discusses critical system-level behaviors such as physical memory coherency, granularity, and width, the role of caches and write buffers, translation buffers, and rules for data sharing in multiprocessor environments, including read/write ordering and atomic operations using load-locked/store-conditional primitives. It also addresses the imprecise nature of arithmetic traps and how software can manage them.
  • PALcode Architecture: Explains the Privileged Architecture Library (PALcode) as a flexible software layer providing essential operating system primitives (e.g., context switching, interrupts, exceptions, memory management) that would otherwise require microcode, thereby making Alpha highly adaptable to multiple operating systems. Specific PALcode instructions for VMS and OSF/1 are detailed.
  • Software Considerations: Offers guidelines and best practices for software developers and compilers to achieve optimal performance, including instruction and data alignment, branch prediction, cache/TB conflict avoidance, and the proper use of memory barrier instructions for synchronization.
  • Floating-Point Conformance: Outlines Alpha's adherence to the IEEE 754-1985 standard for binary floating-point arithmetic and its hardware/software support for exception handling.
  • Instruction Encodings: Provides a reference for the hexadecimal values of opcodes and function codes.

In essence, the handbook serves as a detailed technical reference for understanding, implementing, and programming the Alpha microprocessor architecture.

EC-H1689-10
1992
246 pages
Quality

Original
11MB

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