8-3 Input Nand Gates Mii5

Order Number: M115

This document is a technical schematic diagram for a printed circuit board designed by Digital Equipment Corporation in 1967. It illustrates the layout of six 3-input NAND gates (using DEC7410N integrated circuits) and three decoupling capacitors (.01MFD). The schematic specifies that each integrated circuit uses pin 7 for ground and pin 14 for +5V. It also includes a parts list referencing the integrated circuits and capacitors used in the assembly.

M115
2000
1 pages
Quality

Original
74.3kB

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