Set-Reset Memory

This document is a technical schematic for a "Set-Reset Memory" circuit, published by the Digital Equipment Corporation in 1969. The circuit utilizes a mercury relay (HGSM5020), several transistors (Q1, Q2, Q3, Q4, Q5), and a configuration of diodes and resistors to function as a memory element. The schematic includes a conversion chart mapping DEC-specific component part numbers to industry-standard EIA numbers (e.g., D600 to 1N4009) and specifies that all resistors are 1/4W 10% tolerance unless otherwise noted. The document is intended for test and maintenance purposes and notes the proprietary nature of the circuit design.