Flip-Flop Type B200

This document provides technical specifications and operational details for the B200 Series buffered flip-flop, which is designed for use in 10 mc register circuits. Key details include:

• Operational Characteristics: The flip-flop supports unidirectional counting and shifting, featuring delayed level inputs with JK characteristics and a typical delay time of 30–35 nsec.
• Inputs: Includes direct coupled inputs (Pins V and T) for clearing and presetting, as well as gated inputs (Pins J, K, N, P, R, S) for logic operations. Detailed instructions are provided on load requirements and the usage of pulse inputs for triggering.
• Outputs: The device provides 0 and 1 outputs capable of handling specific load capacities. A separate indicator output (Pin F) is provided for driving indicators without overloading the primary flip-flop circuitry.
• Performance Metrics: A table is included illustrating the relationship between flip-flop input frequency and maximum allowable inverter base inputs, noting how output driving capability is affected by load and frequency.
• Power Requirements: The module operates on +10V (11 mA) and -15V (45 mA) power supplies.