This document is an engineering schematic for a Digital Equipment Corporation (DEC) deflection amplifier. The circuit is designed to process an input signal and drive a yoke, utilizing two integrated circuits (E1 and E2) and a multi-stage transistor output configuration featuring both PNP (Q2) and NPN (Q3, Q4) transistors. The schematic includes comprehensive component values for resistors, capacitors, and diodes, as well as a transistor and diode conversion chart to cross-reference the proprietary DEC parts with standard EIA equivalents. The document is marked for test and maintenance purposes and is dated 1970.
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