Pdp-8/e and Pdp-8/f and Pdp-8/m Small Computer Maintenance

This document provides a technical description and logic analysis of the processor console, major register gating, and power supply systems for the PDP-8/E, PDP-8/F, and PDP-8/M small computers.

The document is divided into the following primary sections:

• Programmer's Console: Detailed logic analysis of key-initiated operations (DEP, EXAM, CONT, CLEAR, etc.), indicator lamp/LED display circuits, and switch register control logic.
• Major Register Gating: A comprehensive explanation of how data is exchanged between major registers (PC, CPMA, AC, MQ, MB) using multiplexers, adders, and timing state signals.
• Major State Register: Analysis of the four machine states (FETCH, DEFER, EXECUTE, and DMA) and the IR decoder logic.
• Control Signals: Technical breakdown of the source, destination, and route control signals, including carry-in, shift control, and data line enabling.
• Teletype Control: Description of the KL8-E console Teletype interface, including transmission/reception timing, address selection, interrupt control, and the timing diagrams for I/O operations.
• Power Supplies: Detailed technical specifications and circuit descriptions for the H724/H724A (PDP-8/E) and H740 (PDP-8/F and PDP-8/M) power supplies. This includes information on regulated DC voltages, overvoltage protection, thermal overload protection, and power monitoring/interlock circuits.