System Introduction

Document Summary

This document serves as a technical handbook for the Digital Equipment Corporation (DEC) PDP-8/E and PDP-8/M computers. It provides an overview of the system architecture, organization, and operational procedures.

Key components of the document include:

• System Overview: Introduces the PDP-8/E and PDP-8/M processors, detailing their 12-bit, fixed word length, parallel-transfer architecture and the OMNIBUS communication structure. It describes the modular nature of the system, including supported memory and peripheral configurations.
• Computer Organization: Explains the function of internal registers (Accumulator, Multiplier Quotient, Program Counter, etc.), the role of the Timing Generator and Bus Loads, and the operation of the Programmer's Console.
• Standard Operation & Loading: Provides detailed procedural guidance for manual data entry, the usage of the ASR 33 Teletype console, and the loading of programs. This section covers the "bootstrap" process, including the use of the Read-In Mode (RIM) and Binary (BIN) loaders, and how to utilize the Symbolic Editor and PAL III Assembler to create and run custom programs.
• Instruction Set: Categorizes and defines the instruction repertoire, which is divided into Memory Reference, Augmented (IOT and Operate), and Housekeeping instructions. It explains the bit-level formatting of these instructions, execution cycles, and the program interrupt system.

Overall, the document acts as both a system familiarization guide for new users and a reference manual for programming and maintaining the PDP-8 family of computers.