Pdp-12 Basic Memory Control Test

Summary

This document provides the source code and documentation for the "PDP-12 Basic Memory Control Test" (MAINDEC 12-D1FA-D), created by Harold Long on February 28, 1971.

Purpose: The program is a diagnostic tool designed to exercise all memory control instructions available on the PDP-12 computer. It is capable of operating in both "8 mode" and "L mode" and requires 4K of memory.

Key Features:

• Operating Modes: It tests both PDP-8 and LINC mode memory control operations.
• Switch Register Options: The program includes various options set via the switch register (RSW), such as inhibiting error halts, suppressing error printouts, and enabling scope loops for specific test routines.
• Program Control: The test is managed by a monitor resident in Bank 0 (locations 5000-5177). Upon completion of a test, if an error is detected, the program triggers an error message and halts at location 5033.
• Diagnostic Routines: The document contains extensive assembly code listing numerous tests (labeled TST03 through TST29) designed to verify specific functions such as memory field switching, interrupt handling, jump operations, and data field loading.