Kl8-ja & Kl8-ka/kb/kc/kd Loop Back Test

This document serves as the technical documentation and source code listing for a diagnostic program designed for Digital Equipment Corporation's terminal control/data interface options (models M8655-YA through YC).

Key functions of the document include:

• Purpose: The program is used to verify the functionality of terminal interfaces by performing loop-back tests using either EIA or 20mA current loop connections.
• Operating Instructions: It details hardware requirements, connection procedures, switch register settings, and initialization steps to run the diagnostic on a PDP-8 processor.
• Test Descriptions: The manual provides an in-depth breakdown of various test sequences, including control/data flag checks, baud rate timing tests, and interrupt capability verification.
• Error Reporting: It outlines how the program identifies errors, reports them via the terminal, and provides diagnostic codes to pinpoint issues.
• Source Listing: The majority of the document consists of the assembly language source code for the "Loop Back Test," including memory maps, subroutine calls, and constant definitions used during testing.