Pdp-8, 8i, 8s Extended Memory Control Test

This document serves as the technical specification and diagnostic program listing for testing the extended memory control logic on PDP-8, 8I, or 8S computer systems. The program verifies the proper operation of the extended memory fields, including data field (DF) and instruction field (IF) switching, interrupt handling, auto-indexing, and RMF (Return from Interrupt) instructions.

Key aspects of the document include:

• Requirements: A minimum of 4K of extended memory is required to run the diagnostics.
• Methodology: The program cycles through various subroutines that perform specific functional tests, such as verifying the ability to reference all memory fields, testing the auto-index registers, and validating the non-existent memory detection logic.
• Error Handling: If an error is encountered, the program halts. The document provides a detailed table of error halts and descriptions to assist in troubleshooting and identifying the failing logic.
• Operating Instructions: It provides specific setup procedures, including switch register settings (SR 8-11) for selecting the number of memory fields and starting the program at address 0200.
• Assembly Listing: The remainder of the document (pages 11–54) contains the full PAL10 assembly language source code for the diagnostic, including cross-reference tables and constants.