Memory Address Test

This document details the diagnostic procedure for the "Memory Address Test" on the PDP-8 computer. The program is designed to verify the integrity of the memory addressing circuits by ensuring that data can be correctly written to and read from sequential memory locations.

Key features of the diagnostic program:

• Methodology: The test executes in four phases, sequentially loading and verifying memory in both forward and reverse directions. During these phases, the program sets the contents of each tested memory location to be equal to its own address.
• Operation: The software is provided in RIM format and can be loaded into either low memory (0000-0175) or high memory (7400-7575) depending on the user's needs.
• Error Reporting: If a memory location fails to retain the correct data, the program provides an error printout identifying the address that failed and the incorrect contents found at that location.
• Diagnostics: Detailed assembly source code and symbol tables are included to assist operators in troubleshooting and identifying specific address selector card issues.