FCO 10XXX-0001, Mem Config Restrict/Cache Err Correction Routine

Order Number: EQ-01694-01

This Field Change Order (FCO 10XXX-0001) addresses two critical issues on DEC 7XXX and DEC 10000-6XX systems: memory configuration restrictions that prevent booting with "INVALID MEMORY INTERLEAVING- boot disallowed" messages, and a faulty cache error correction routine that can disrupt system operation. The solution involves replacing existing E2040-AA, E2040-AB, and older E2040-YA CPU modules (revisions A01-D01) with a new E2040-YA CPU module at revision E01 or higher. This upgrade also provides a performance boost for 182 MHz systems, increasing them to 200 MHz.

The FCO details a step-by-step upgrade procedure, including shutting down the system, recording existing configurations, handling electrostatic discharge sensitive components, physically replacing the CPU module, verifying system functionality, and restoring system-specific console environment variables. A minimum Console version V2.5 is required for systems with the new E01 revision module. The process concludes with instructions for returning old modules and reporting the FCO activity.

EQ-01694-01
December 1994
Number of pages unknown
Quality

Original
13.1kB
EQ-01694-01
December 1994
Number of pages unknown
Quality

Original
13.1kB
EQ-01694-01
December 1994
Number of pages unknown
Quality

Original
13.0kB

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