DEC 7000/10000 AXP KN7AA CPU

This technical manual provides a comprehensive, register-level description of the DEC KN7AA CPU module, an Alpha AXP processor designed for the LSB platform and used in DEC 7000 and DEC 10000 RISC systems.

The document details the module's architecture, including an overview of the DECchip 21064 microprocessor, its functional units, internal cache, pipeline organization, and internal processor registers. It explains the module's address space, the two-level cache hierarchy (P-cache and B-cache), and the LSB Bus Interface (LEVI) responsible for transactions and cache coherence.

Further sections cover I/O operations, device interrupt handling, and an extensive list of CPU module registers with bit-level functional descriptions. The manual also describes the Privileged Architecture Library (PALcode) and its environment, detailing how it supports operating system primitives, context switching, and memory management.

Dedicated chapters outline system support for OpenVMS AXP and DEC OSF/1 AXP, focusing on memory management and process structure. Finally, it elaborates on the CPU module's initialization process, including self-tests and operating system bootstrapping, and provides thorough information on error handling, machine checks, and fault isolation parse trees. The manual targets system software developers and Digital service personnel.