DEC 3000 Model 500/500S AXP Technical Summary

This document provides a technical overview of the DEC 3000 Model 500 (workstation) and 500S (server) AXP systems, highlighting their architectural features and performance-contributing implementation details.

Key System Features: The system is built on the Alpha AXP 64-bit architecture, featuring a DECchip 21064 CPU running at 150 MHz. This superscalar, super-pipelined processor includes on-chip 8KB instruction and 8KB data caches, and a 512KB on-board second-level cache. Memory is expandable from 32MB to 256MB (or up to 1GB with 4Mx4 DRAMs) with a 114 MB/sec bus speed. For I/O, it includes SCSI-2, 6 high-performance TURBOchannel slots (100 MB/sec), AUI thickwire and 10BASE-T Ethernet ports. Storage options include four 3.5-inch internal fixed drives (up to 4.2GB) and two 5.25-inch removable media drives, with a maximum integral SCSI storage of 11.6GB. The system also features built-in audio capabilities and console password security.

System Software: The DEC 3000 AXP supports multiple operating systems, specifically OpenVMS AXP and DEC OSF/1 AXP (Digital's UNIX implementation). Digital provides a full suite of development languages (Ada, C, COBOL, FORTRAN, Pascal) leveraging a common intermediate program specification language for portability. The system's windowing environment is DECwindows Motif, Digital's enhanced X Window System implementation. It supports various graphics programming interfaces, including Xlib, Display PostScript, PHIGS, GKS, PEXlib, Iris GL, and OpenGL. Networking is robust, offering TCP/IP, Network File System (NFS), DECnet/OSI, and Network Application Support (NAS), with connectivity via Ethernet and optional FDDI. Application software includes CAD packages, desktop productivity tools, and DEC SoftPC for MS-DOS emulation.

Graphics Options: The system offers TURBOchannel-based graphics options. The HX Graphics Option provides 8-plane, accelerated 2D graphics and windowing, utilizing a Smart Frame Buffer (SFB) custom ASIC for fast line drawing, polygon filling, and pixel copy. For 3D acceleration, the PXG+ and PXG Turbo+ options offer common architectures for geometry processing and scan conversion. The PXG+ supports 8- or 24-plane 3D graphics with double buffering and an optional Z-buffer, while the PXG Turbo+ is a dedicated 24-plane 3D accelerator with double buffering, Z-buffer, and an additional pixmap buffer. These accelerators significantly offload the CPU and enhance performance. Multiscreen configurations are supported for HX options.

DEC 3000 Model 500S AXP Server: The server variant shares the same CPU and system enclosure as the workstation but excludes a monitor, requiring a terminal for console functions. It is designed for roles such as a disk file server, shared database host, peripheral host, network gateway, or timesharing system. Server performance is evaluated using AIM Suite Benchmarks (Milestone, III Multiuser) and TPC Benchmarks (TPC-A, TPC-B) for transaction processing.

Alpha AXP Architecture and DECchip 21064: The Alpha AXP architecture is a forward-looking, true 64-bit RISC design intended for a 25-year lifespan, emphasizing high clock speed, multiple instruction issue, and multiprocessing. It's explicitly designed to be unbiased towards any specific operating system or language, supporting a flexible "PALcode" (Privileged Architecture Library) for OS-specific primitives. The DECchip 21064 microprocessor implements this architecture, featuring a fully pipelined design capable of issuing two instructions per clock cycle (up to 400 MIPS) and supporting both VAX and IEEE floating-point standards.