VAX/VMS Device Driver Appendix

This document serves as an appendix to VAX/VMS Device Driver Training, offering supplementary technical readings on various Digital Equipment Corporation (DEC) hardware and software interfaces. It begins by detailing the LP11 Lineprinter and PC11 Paper Tape Reader/Punch systems, describing their control and data registers, operational specifications, and how they interact with the UNIBUS.

A substantial part of the document explains the UNIBUS Theory and Operation, covering its 56 signal lines, master-slave communication, priority arbitration for bus mastership, and asynchronous data transfer mechanisms (DATI, DATIP, DATO, DATOB). It also highlights the function of the UNIBUS Adapter (UBA) as the interface between the UNIBUS and the Synchronous Bus Interconnect (SBI), facilitating memory-mapped I/O and direct memory access (DMA) transfers.

The document then focuses on the DR32 Device Interconnect (DDI), an architectural specification (with DR780 as an implementation). It emphasizes the DR32's high-speed, 32-bit parallel data transfer capabilities (up to 6 MB/sec), its half-duplex operation, and point-to-point interconnect. Key features include support for command and data chaining, CPU-to-CPU links, large transfers (>64K bytes), and random access data alignment. It also describes separate control and data paths for overlapping messages and introduces "action routines" for synchronization.

User interaction with the DR32 is achieved via command packets placed in input, termination, and free queues within the user's p0 space. The process for software to build and submit packets, and for hardware to process them and generate interrupts, is outlined. The document concludes by detailing the software interface, where users issue $QIOS (Queue I/O System services) like IOS_LOADMCODE and IOS_STARTDATA, and explains the use of IRPES (I/O Request Packet Extension Structure) by the DR32 driver to manage multiple buffers and facilitate transfers exceeding 64K bytes.