VAX/VMS Device Driver Required Driver Routines

This Digital Equipment Corporation training module, "VAX/VMS Device Driver Required Driver Routines," outlines the essential components and development procedures for core routines in VAX/VMS device drivers. It primarily focuses on the Start I/O routine and the Interrupt Service Routine (ISR), which are fundamental for all device drivers.

The document begins by setting learning objectives, including understanding instruction set restrictions for device register access and writing these two key routines for both buffered and direct I/O. It details critical restrictions on driver code, such as requiring position-independent and reentrant code, using non-interruptible instructions for I/O space references (byte/word for UNIBUS, long word for MBA/MASSBUS), and exercising caution when calling system routines.

Key development aspects covered include:

• Defining Symbolic Offsets: Utilizing system macros to create symbolic references for various data block entries (e.g., CRB, DDB, UCB).
• Extending the Unit Control Block (UCB): Instructions on how to add custom fields to the UCB using macros like $DEFINI and $DEF.
• Defining Symbolic Bit Fields: Explanation of the _VIELD macro for generating symbols representing bit numbers, masks, and field sizes.

Comprehensive sections are dedicated to:

• Start I/O Routine: This routine's role in activating devices and managing I/O requests is explained, along with its execution context (kernel mode, specific IPLs) and typical processing steps (determining I/O function, copying IRP data to UCB, acquiring resources, and manipulating device registers). Special considerations for full-duplex drivers, involving the management of multiple I/O requests and synchronization, are also discussed.
• Interrupt Service Routine (ISR): Details how ISRs are invoked by hardware interrupts, their execution environment (device IPL, kernel mode), and typical actions such as locating the UCB, identifying the interrupt type (expected/unexpected), restoring the fork process context, and dismissing the interrupt. Specific examples are provided for both UNIBUS and MASSBUS device drivers, highlighting differences in stack handling and register usage.

The document concludes with an appendix that provides detailed notes on the steps involved in buffered and direct I/O operations, including channel allocation, mapping register utilization, powerfail handling, and the construction of UNIBUS addresses for DMA transfers.