PVAX2/PMariah Memory/Graphics/Video Controller

This document is the hardware specification for the PVAX2/PMariah Memory/Graphics/Video Controller, dated September 13, 1990. It details the Low Cost Graphics (LCG) system, which is integrated within Digital's S-Chip (DC7201) ASIC, aiming to provide competitive 2D graphics performance at minimal cost by offloading CPU tasks.

Key aspects of the controller include:

1. Memory System:

   • Supports byte parity memory with up to four banks of 64-bit main memory, allowing configurations from 8MB to 32MB for PVAX2, and up to 104MB for PMariah with 4Mx1 DRAMs.
   • Manages up to four frame buffers and supports various data access sizes (byte, word, longword, quadword, octaword).
   • Prioritizes memory requests, with the Video Controller (shift register loads, cursor buffer loads, memory refresh) having the highest priority, followed by other system components, and the Graphics Address Generator (LCG) operating as a background task utilizing spare memory cycles.

2. Graphics Controller (LCG):

   • 2D Primitives: Supports a range of 2D graphics primitives, including lines/vectors, 3-operand RasterOps (with tiling, stipples, color expansion, plane extraction), and solid/stenciled text with variable-sized glyphs.
   • Virtual Memory Support: Enables drawing to scattered portions of main memory via translation buffers, handling page faults and ensuring cache coherency. However, the Command FIFO and Clip List must reside in contiguous physical memory.
   • Command FIFO Mechanism: Utilizes a packet-oriented FIFO with a ring buffer in main memory for CPU-to-LCG command transfer. A "short circuit" mechanism allows immediate execution when the LCG is idle.
   • Address Generator: Supports various graphics operations (Bresenham algorithm for lines, scrolling, RasterOps, text, DMA), generating addresses for both frame buffer and main memory.
   • Pixel Shifter and Logic Unit (SLU): Performs 16 boolean functions, funnel shifting, and manages write masks for individual planes, serving as the core graphics processing unit.
   • Window Clipping: Provides hardware support for clipping drawing primitives to overlapping windows.

3. Video Controller:

   • Programmable, supporting multiple screen resolutions up to 2048x2048.
   • Supports both monochrome and 8-plane color displays, and includes a 64x64x2 cursor.
   • Video timing parameters are programmable and stored in the Video Module's Diagnostic ROM.

The document also provides detailed memory maps, performance estimates, and specifications for various LCG internal registers and signal definitions, emphasizing its company confidential nature.