FPP12 Floating-Point Processor

This document describes the FPP12 Floating-Point Processor, a parallel processor designed to enhance the capabilities of Digital's 12-bit computers (PDP-8 and PDP-12) by significantly reducing computation time for complex calculations—up to 100 times faster than software alone.

Key features include high speed (e.g., 25 microseconds for a floating-point multiply), high accuracy (1 part per 16 million), and a large dynamic range (10^-620 to 10^620). The FPP12 operates independently and asynchronously with the Central Processor, effectively doubling computing power. It offers large addressability (32K memory), a comprehensive 34-instruction set, and re-entrant hardware to facilitate multi-tasking and save memory. The processor supports both 3-word floating-point and 2-word double-precision fixed-point data formats, utilizing the DEC standard floating-point format with a 12-bit signed exponent and a 24-bit signed mantissa. All calculations are performed with 28-bit precision and rounded to 24 bits.

Built with the latest TTL-MSI technology, the FPP12 is designed for dependability and easy maintenance, being flexible, immune to noise, and field installable. Typical execution times range from 6 microseconds for normalization to 26 microseconds for division. It consumes 150 watts and fits in a 21-inch rack space.

The FPP12 is particularly useful in applications such as signal processing (e.g., biomedical, analytical chemistry, physics, and industrial research) and education, where its speed and multi-tasking capabilities allow for real-time data analysis and sophisticated time-sharing experiments. Accompanying software includes an Assembler for FPP-12 mnemonics, the Analytical Instrumentation Operating System (AIPOS) for real-time monitoring and control, and the Display-Oriented Math Package (DORA) for interactive data display and mathematical operations like integration, differentiation, and scaling.