Linc Instruction Formats and PDP-8 Instruction Formats

This document illustrates the instruction formats for two distinct computer architectures: LINC and PDP-8.

For LINC, it details:

• Full Address Class: A 12-bit format showing the operation code and address.
• Index Class: A 12-bit format including operation code, address, and index registers.
• Tape Instructions (2 Words):
  • First Word: Specifies fields for instruction class, unit number, instruction type, motion bit, memory quarter starting address, and starting tape block number.
  • Second Word (Single block class): Defines the number of additional blocks and starting tape block number.
  • Second Word (Multiple block class): Shows the memory quarter starting address.

For PDP-8, it outlines:

• Memory Reference Instruction Bit Assignments: A 12-bit format detailing operation codes (0-5), memory page, indirect addressing, and address.
• Group 1 Operate Instruction Bit Assignments: A 12-bit format (for operation code 7) showing bits for functions like Clear Accumulator (CLA), Complement Accumulator (CMA), Clear Link (CLL), Complement Link (CML), Increment Accumulator (IAC), and rotate operations (RAR, RAL, RTR, RTL). Associated logical sequences are also listed.
• Group 2 Operate Instruction Bit Assignments: Another 12-bit format (for operation code 7) including bits for CLA, Skip if Accumulator Zero (SZA), Skip if Accumulator Minus (SMA), Skip if Link Minus (SML), Operate Skip Reverse (OSR), and Halt (HLT), with logical sequences based on bit 8's value (e.g., skips based on accumulator or link states).