VAX 9000 Family XJA Technical Description

This technical document, "VAX 9000 Family XJA Technical Description" (First Edition, May 1990), serves as a comprehensive reference manual for Digital Equipment Corporation's Customer Services and Educational Services personnel. It details the operation of the VAX 9000 system's I/O channel, specifically focusing on the XJA adapter, the JXDI bus, and the XMI bus.

The document provides an overview of the I/O Configuration, describing the JXDI bus as the interface between the I/O Control Unit (ICU) and the XJA, and the XMI bus as a standard, pended, synchronous I/O bus connecting the XJA to various XMI node adapters. It outlines the XJA's primary functions as the interface between the System Control Unit (SCU) and the XMI bus, responsible for data transfer, formatting, error checking, interrupt generation, and system control via its registers.

A major portion of the document is dedicated to the four types of transactions handled by the XJA:

1. DMA Transactions: Direct memory access operations (reads and writes) initiated by XMI devices to the VAX 9000 main memory.
2. CPU Transactions: Reads and writes to XMI device registers or XJA's own registers, initiated by the system CPU or Service Processor Unit (SPU).
3. Interrupt Transactions: Generated either by the XJA (due to internal or bus errors) or by XMI devices (requesting CPU service), categorized as normal or implied vector, and fatal or nonfatal.
4. Add-On Self-Test (AOST): A built-in diagnostic feature used to test the XJA's internal logic and buses.

The document meticulously explains the data flow and timing across the different asynchronous clock domains (JXDI at 16 ns, internal CBI at 32 ns, XMI at 64 ns), detailing how data packets are processed and reformatted by the XJA's internal components (such as XRC, RRF, RCM, TRF, TCM, XDE, XCE). It also covers system address space allocation for XMI nodes, BI windows, and XJA private registers, along with the mechanisms for address mapping and translation between the VAX 9000 system and the XMI bus.

Finally, a significant section provides detailed descriptions of the 23 XJA registers (categorized as XMI space or XJA private registers), explaining their purpose, bit fields, and their roles in monitoring, controlling, and diagnosing the I/O system's operations and errors.