KA640 CPU Module Technical Manual

This technical manual, "KA640 CPU Module Technical Manual (EK-KA640-TM-001)," from Digital Equipment Corporation, provides a comprehensive overview of the KA640 CPU module.

Key aspects covered include:

1. Overview and Introduction:

   • The KA640 is a quad-height VAX processor module designed for Q22-bus (extended LSI-11 bus) systems, specifically used in MicroVAX 3300 and 3400.
   • It comes in two variants: KA640-AA (multiuser software support) and KA640-BA (single-user software support for workstations/VAXservers).
   • Key integrated components include a CVAX central processing unit (20 MHz, 100 ns microcycle), a CFPA floating-point accelerator, a 1 Kbyte cache, a CMCTL memory controller (supporting up to 52 MBytes of ECC memory via MS650 modules), on-board DSSI and Ethernet controllers, and a CQBIC Q22-bus interface.
   • A System Support Chip (SSC) provides console, boot code, operating system support, and various timers.

2. Installation and Configuration:

   • Details the physical installation of the KA640 CPU module (in slot 1) and MS650 memory modules (adjacent slots) into Q22/CD backplanes.
   • Explains how to configure the KA640 using the H3602-SA CPU cover panel, including power-up mode, serial line baud rate, DSSI node ID, and Ethernet port selection.

3. Architecture:

   • Central Processor: Describes the CVAX chip's implementation of the VAX instruction set, data types, and full VAX memory management, including general purpose registers (GPRs), processor status longword (PSL), and internal processor registers (IPRs).
   • Floating Point Accelerator: Details the CFPA chip's execution of floating-point instructions.
   • Cache Memory: Explains the cache's organization, address translation, and behavior on writes, along with its error detection capabilities.
   • Main Memory System: Covers memory organization, addressing, write protocols, and the main memory error status and control/diagnostic registers.
   • Interfaces: Provides in-depth information on the Console Serial Line, Time of Year Clock and Timers, Boot and Diagnostic Facility (ROM, battery-backed RAM, hardware initialization), Q22-bus Interface (address translation, interrupt handling, error reporting), Network Interface (LANCE chip, buffer management, protocols), and Mass Storage Interface (DSSI bus, SII chip, command blocks, registers).

4. KA640 Firmware:

   • Describes the firmware's features, such as board initialization, power-up self-tests, VAX standard console emulation (including detailed command syntax and a wide range of commands like BOOT, EXAMINE, DEPOSIT, START, etc.), and support for multilingual messages and MOP.
   • Explains various halt conditions and how the firmware determines the appropriate action.
   • Details the bootstrapping process from different devices (disk, tape, network, PROM) and the operating system restart procedure.
   • Outlines public data structures (e.g., Console Program Mailbox) and entry points for external access.
   • Lists various halt, console, and VMB error messages.

5. Appendices:

   • Specifications: Provides physical, electrical, and environmental specifications (temperature, humidity, altitude) for the module.
   • Address Assignments: Offers detailed maps of the VAX memory space and VAX input/output (I/O) space, including external IPRs and global Q22-bus addresses.
   • Q22-bus Specification: Describes the bus's general characteristics, master/slave relationship, signal assignments, data transfer bus cycles (DATI, DATO, DATIO, DATBI, DATBO), DMA protocol, interrupt handling (4-level configurations), and electrical characteristics (termination, wiring, loading).
   • Acronyms: A glossary of terms used in the manual.

The manual is intended for design engineers and applications programmers familiar with Digital's Q22-bus and VAX instruction set, serving as a comprehensive technical reference for the KA640 CPU module.